Advances in Computers: Architectural Advances

Front Cover
Marvin Zelkowitz
Elsevier, 2011 M09 21 - 342 pages

The series covers new developments in computer technology. Most chapters present an overview of a current subfield within computers, with many citations, and often include new developments in the field by the authors of the individual chapters. Topics include hardware, software, theoretical underpinnings of computing, and novel applications of computers. This current volume emphasizes architectural advances and includes five chapters on hardware development, games for mobile devices such as cell phones, and open source software development.

The book series is a valuable addition to university courses that emphasize the topics under discussion in that particular volume as well as belonging on the bookshelf of industrial practitioners who need to implement many of the technologies that are described.

  • Current information on power requirements for new processors
  • Development of games for devices with limited screen sizes (e.g. cellular telephones)
  • Open source software development
  • Multicore processors
 

Selected pages

Contents

Chapter 2 Designing Computational Clusters for Performance and Power
89
Chapter 3 CompilerAssisted Leakage Energy Reduction for Cache Memories
155
Challenges and Opportunities
191
Recent Research Results and Methods
243
Author Index
297
Subject Index
307
Contents of Volumes in this Series
319
Copyright

Common terms and phrases

application area overhead bandwidth benchmarks Bluetooth cache leakage cache lines chip cluster communication compiler compiler-assisted components Computational Clusters Computer configuration cores CPUSPEED crossbar cycle data cache DCache devices dynamic energy overhead efficiency energy consumption energy savings energy-delay execution FOSS developers FOSS projects FOSS systems FOSSD free software gamer Green Destiny hardware ICache IEEE implemented increase interconnect interface International J2ME L2 cache latency leakage energy LINPACK Linux loop memory metric microprocessor MIDP mobile games mobile phones modules multi-core architectures multiprocessor nodes Nokia open source software OpenGL ES operating optimization parallel players power consumption power profiles power-aware Power4 pre-activate prediction buffer Proc processor queue reduce scheduling server sharing simulation simultaneous multithreading Software Engineering source code static studies sub-bank prediction switching Symbian techniques threads tion Windows Mobile workloads

Popular passages

Page 1 - Department of Computer Science and Engineering University of California, San Diego, La Jolla, CA 92093-0114 The testability of a VLSI design is strongly affected by its register-transfer level (RTL) structure.
Appears in 153 books from 1976-2008
Page xi - Professor in the Computer Science and Engineering Department at the University of California, San Diego.
Appears in 41 books from 1963-2007
Page ix - He is a member of the IEEE and the IEEE Computer Society.
Appears in 20 books from 1971-2007

References to this book

Bibliographic information

QR code for Advances in Computers
TitleAdvances in Computers: Architectural Advances
Volume 69 of Advances in Computers
EditorMarvin Zelkowitz
PublisherElsevier, 2011
ISBN0080524400, 9780080524405
Length342 pages
  
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