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" D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A Framework for Architectural-Level Power Analysis and Optimizations. "
Advances in Computers: Architectural Advances - Page 150
edited by - 2011 - 342 pages
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Embedded Computer Systems: Architectures, Modeling, and Simulation: 5th ...

Timo D. H?m?l?inen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis - 2005 - 489 pages
...JL, Patterson, DA: Computer Architecture: A Quantitative Approach. 3 edn. Morgan Kaufmann (2003) 8. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework...architectural-level power analysis and optimizations. In: In Proceedings of the 27th Annual International Symposium on Computer Architecture. (2000) 83-94 9....
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Advances in Computers: Parallel, Distributed, and Pervasive Computing

Marvin Zelkowitz - 2005 - 312 pages
...and modeling challenges for next-generation microprocessors", IEEE Micro (December 2000) 26-44. [10] Brooks D., Tiwari V., Martonosi M., "Wattch: a framework...architectural-level power analysis and optimizations", in: Proceedings of the 27th International Symposium on Computer Architecture (ISCA), June 2000. [11] Burger...
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Advances in Computers: Parallel, Distributed, and Pervasive Computing

Marvin Zelkowitz, Ali R. Hurson - 2005 - 312 pages
...and modeling challenges for next-generation microprocessors", IEEE Micro (December 2000) 26-44. ( 10] Brooks D., Tiwari V., Martonosi M., "Wattch: a framework...architectural-level power analysis and optimizations", in: Proceedings of the 27th International Symposium on Computer Architecture (ISCA). June 2000. [11| Burger...
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High Performance Computing - HiPC 2007: 14th International Conference, Goa ...

Srinivas Aluru, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna - 2007 - 687 pages
...leakage for architects. Technical Report CS-2003-05. Dept. of CS, University of Virginia (2003) [13] Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework...architectural-level power analysis and optimizations. In: Proc. 27th IEEE/ ACM International Symposium on Computer Architecture, pp. 83-94 (2000) Self -optimization...
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High Performance Embedded Architectures and Compilers: Second International ...

Koen De Bosschere, David Kaeli, Per Stenström, David Whalley, Theo Ungerer - 2007 - 307 pages
...instruction scheduling logic. In: Proceedings of International Symposium On Microarchitecture. (2001) 13. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework...architectural-level power analysis and optimizations. In: Proceedings of the International Symposium on Computer Architecture. (2000) 83-94 15. Bai, R., Sylvester,...
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Advances in Multimedia Modeling: 13th International Multimedia ..., Part 2

Tat-Jen Cham, Jianfei Cai, Chitra Dorai, Deepu Rajan, Tat-Seng Chua, Liang-Tien Chia - 2006 - 756 pages
...Set. Computer Architecture News (1997) See also http://www.simplescalar.com for more information. 9. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework...architectural-level power analysis and optimizations. In: Proceedings of the 27th Annual International Symposium on Computer Architecture (ISCA-27). (2000) 83-94...
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Integrated Circuit and System Design. Power and Timing Modeling ...

Nadine Azemard - 2007 - 595 pages
...Grunwald, D.: The SimpleScalar-Arm power modeling project, http: //www. eecs .umich.edu/~panalyzer/ 4. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework...architectural-level power analysis and optimizations. In: Proceedings of the 27th Annual International Symposium on Computer Architecture (June 2000) 5. Contreras,...
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Controlling Energy Demand in Mobile Computing Systems

Carla Schlatter Ellis - 2007 - 98 pages
...Operating System (EW9), Kolding, Denmark, September 17-20, 2000, pp. 37-42. Brooks, D., Tiwari, V., and Martonosi, M., "Wattch: a framework for architectural-level power analysis and optimizations," in 27th Annual Int. Symp. on Computer Architecture (ISCA),]\m& 2000, pp. 83-94. Carter, C., Kravets, R.,...
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Euro-Par 2007 Workshops: Parallel Processing: HPPC 2007, UNICORE Summit 2007 ...

Luc Bougé, Franck Cappello, Jack J. Dongarra, Thomas Hérault - 2008 - 247 pages
...chip-multiprocessor caches. In: Proc. of the 37th MICRO, pp. 319-330. IEEE Computer Society, Los Alamitos (2004) 3. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A Framework...ArchitecturalLevel Power Analysis and Optimizations. In: Proc. of the 27th Int. Symp. Comp. Arch., pp. 83-94. IEEE Computer Society, Los Alamitos (2000) 4. CADENCE Design...
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High-Performance Computing: 6th International Symposium, ISHPC 2005, Nara ...

Jesus Labarta - 2008 - 536 pages
...fine grain parallel processing on single chip multiprocessors. Trans, of IPSJ 40(5) (May 1999) 23. Brooks, D., Tiwari, V., Martonosi, M.: Wattch: A framework...architectural-level power analysis and optimizations. In: Proc. of the 27th ISCA (June 2000) 24. Kawaguchi, H., Shin, Y, Sakurai, T.: uITRON-LP: Power-conscious real-time...
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